Update scalafmt-core to 3.11.5

.git-blame-ignore-revs

@@ -0,0 +1,2 @@
+# Scala Steward: Reformat with scalafmt 3.11.5
+c844b15c03f65edc560a86e2fcd412d3cda62461

.scalafmt.conf

@@ -1,4 +1,4 @@
-version = 3.11.4
+version = 3.11.5
 runner.dialect = scala3
 
 maxColumn = 100

compiler/ir/src/main/scala/dfhdl/compiler/printing/DFValPrinter.scala

@@ -173,7 +173,7 @@ trait AbstractValPrinter extends AbstractPrinter:
       members.count {
         case dcl: DFVal.Dcl =>
           !dcl.isPhantom &&
-            (dcl.isPortIn || (dcl.isPortOut && !returnPort.contains(dcl)))
+          (dcl.isPortIn || (dcl.isPortOut && !returnPort.contains(dcl)))
         case _ => false
       }
     getSet.designDB.rootDB.subDBs.get(design.ownerRef) match

compiler/stages/src/main/scala/dfhdl/sim/Interpreter.scala

@@ -58,7 +58,8 @@ object Interpreter:
     private val commitTmp = new Array[Long](regOut.length)
     // kernel-owned memory backing store: one long per word (masked at write). Reads (Op.MEMRD)
     // observe the pre-commit contents; write ports apply after the sweep, like registers.
-    private val mem: Array[Array[Long]] = Array.tabulate(memDepth.length)(k => new Array[Long](memDepth(k)))
+    private val mem: Array[Array[Long]] =
+      Array.tabulate(memDepth.length)(k => new Array[Long](memDepth(k)))
     // memory-less designs skip the commit entirely: a final-false branch the JIT folds out, so the
     // per-cycle path is identical to before the memory node existed (no added call or loop)
     private val hasMem = memWrites.length > 0

compiler/stages/src/main/scala/dfhdl/sim/SimKernel.scala

@@ -8,8 +8,8 @@ package dfhdl.sim
   */
 trait SimKernel:
   /** Install the reset image of each memory (indexed by memory id) into the kernel's backing store.
-    * Called once after construction; memory-less kernels ignore it. The kernel owns the working copy
-    * that writes mutate; `mems` is the reset image and is not retained.
+    * Called once after construction; memory-less kernels ignore it. The kernel owns the working
+    * copy that writes mutate; `mems` is the reset image and is not retained.
     */
   def initMem(mems: Array[Array[Long]]): Unit = ()
 

compiler/stages/src/test/scala/dfhdl/sim/CompositeDesigns.scala

@@ -65,9 +65,9 @@ class RegFileDut extends RTDesign:
   rdata := regs(raddr)
 end RegFileDut
 
-/** Byte-enable RAM (the Servant firmware-RAM shape): 32-bit words with per-byte write enables
-  * (each a masked sub-cell write to the same dynamic address) plus a dynamic-index async read.
-  * Exercises the memory node's masked partial writes and read-first semantics on both tiers.
+/** Byte-enable RAM (the Servant firmware-RAM shape): 32-bit words with per-byte write enables (each
+  * a masked sub-cell write to the same dynamic address) plus a dynamic-index async read. Exercises
+  * the memory node's masked partial writes and read-first semantics on both tiers.
   */
 class ByteMemDut extends RTDesign:
   val waddr = UInt(3) <> IN

docs/getting-started/hello-world/scala-project/.scalafmt.conf

@@ -1,4 +1,4 @@
-version = 3.11.4
+version = 3.11.5
 runner.dialect = scala3
 
 maxColumn = 100

lib/src/main/scala/dfhdl/tools/toolsCore/DFToolsImage.scala

@@ -153,10 +153,10 @@ object DFToolsImage:
       )
 
   /** Whether the given image is resolvable (present locally / overridden / downloadable). A resolve
-    * failure (no container runtime, blocked unprivileged user namespaces, a corrupt or absent asset)
-    * is reported before returning false, so it is distinguishable from an image that is simply not
-    * configured — otherwise the only downstream symptom is a misleading "could not be found in its
-    * DFTools image".
+    * failure (no container runtime, blocked unprivileged user namespaces, a corrupt or absent
+    * asset) is reported before returning false, so it is distinguishable from an image that is
+    * simply not configured — otherwise the only downstream symptom is a misleading "could not be
+    * found in its DFTools image".
     */
   def isAvailable(image: String): Boolean =
     try handle(image).exists

plugin/src/main/scala/plugin/MethodsPhase.scala

@@ -181,6 +181,7 @@ class MethodsPhase(setting: Setting) extends CapturePhase:
                 )
                 hasHDLMethodErrors = true
             }
+        end if
         if (isStatic)
           // The inverse of the ED rule: a static function is a region in which every value is
           // constant, so a non-constant argument has no meaning in it. Its const args become
@@ -210,7 +211,10 @@ class MethodsPhase(setting: Setting) extends CapturePhase:
           // those parameter symbols are exempt from the "no `:==` in an ED method" body rule
           val nbArgSyms = dfValArgs.view.filter(_.tpt.tpe.isDFPortOUTNB).map(_.symbol).toSet
           checkHDLMethodContent(
-            anonDef, isStatic, isEDMethod && hasUnitRet(anonDef), nbArgSyms
+            anonDef,
+            isStatic,
+            isEDMethod && hasUnitRet(anonDef),
+            nbArgSyms
           ) {
             (msg, pos) =>
               report.error(msg, pos)
@@ -459,7 +463,7 @@ class MethodsPhase(setting: Setting) extends CapturePhase:
               // sits several `Apply`/`TypeApply` layers down the curried `:==` spine (extension
               // receiver, then rhs, then `using DFC`), so gather every argument along the spine.
               def spineArgs(t: Tree): List[Tree] = t match
-                case Apply(fun, as)  => as ++ spineArgs(fun)
+                case Apply(fun, as)    => as ++ spineArgs(fun)
                 case TypeApply(fun, _) => spineArgs(fun)
                 case _                 => Nil
               val targetsNBArg = spineArgs(ap).exists(a => nbArgSyms.contains(a.symbol))