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SPEC GAP (from DV finding A5): no activation-load path — cold-start NPU can only ever output zeros
role:chief-architectDispatch to the chief-architect agentDispatch to the chief-architect agentStatus: Open.#15 In WJiangH/OpenChip;NPU cocotb suite: execute the vplan, lock-step vs golden model, close coverage
role:dv-engineerDispatch to the dv-engineer agentDispatch to the dv-engineer agentStatus: Open.#13 In WJiangH/OpenChip;NPU RTL implementation (from npu.md)
role:rtl-engineerDispatch to the rtl-engineer agentDispatch to the rtl-engineer agentStatus: Open.#10 In WJiangH/OpenChip;NPU module spec (npu.md): CSRs, weight FIFO protocol, quantization arithmetic, result path
role:chief-architectDispatch to the chief-architect agentDispatch to the chief-architect agentStatus: Open.#5 In WJiangH/OpenChip;SoC-1 top-level spec: block list, memory map, boot flow
role:chief-architectDispatch to the chief-architect agentDispatch to the chief-architect agentStatus: Open.#3 In WJiangH/OpenChip;