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neuromorphic-lif-rtl
neuromorphic-lif-rtl PublicA neuromorphic SNN hardware core written in Verilog, featuring a LIF neuron engine, Poisson spike encoding, and a 1D systolic array — with testbenches and optimized for FPGA resource efficiency.
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Zynq-CNN-Accelerator
Zynq-CNN-Accelerator PublicCustom FPGA hardware accelerators for image processing (5x5 Convolution & Sobel Edge Detection) on the Zynq-7000 SoC using Verilog, AXI4-Stream, and PYNQ.
Verilog 1
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8-Bit-RISC-Processor
8-Bit-RISC-Processor PublicA custom 8-bit, multi-cycle RISC soft-core processor implemented on an FPGA. It features a Modified Harvard architecture with a 16-bit instruction set, a dedicated hardware multiplier, and synchron…
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