Add permute_2D_sparse_data operator with SYCL implementation for XPU by aagalleg · Pull Request #74 · intel/torchlib-xpu

aagalleg · 2026-06-20T01:29:36Z

Depends on: #73

This PR introduces the permute_2D_sparse_data operator to fbgemm-xpu, enabling 2D sparse data permutation on Intel XPU devices.

Changes

Core Implementation

SYCL Kernels (permute_2d_sparse_data.cpp/h): SYCL implementation that permutes 2D sparse data (lengths [T, B], indices, and optional weights) according to a permutation vector
Host Function (permute_2d_sparse_dataOp.cpp): Top-level operator function with support for weighted and unweighted sparse data
Operator Registration (ops_registry.cpp): Registers the operator with PyTorch's dispatch system using conditional schema registration to avoid conflicts
Python API (ops.py): Clean Python wrapper function with type hints for easy integration

Infrastructure

Build System (CMakeLists.txt): Added SYCL kernels and utility files to build configuration
SYCL Communication Utilities (fbgemm_utils/comm/): Device properties, SYCL context management, and helper functions from intel-sandbox/custom_operator_xpu
Core Utilities (fbgemm_utils/): Essential infrastructure including:
- utils.h/cpp: Kernel launch helpers, device queries, and type definitions
- dispatch_macros.h: Type dispatch macros for multiple data types
- tensor_utils.h: Tensor manipulation and metadata utilities
- function_types.h: Symbol visibility definitions

Testing

Comprehensive Test Suite (test_permute_2d_sparse_data.py):
- Correctness validation for int32/int64 data types
- Sparse data with and without weights
- Permutations with repeated indices
- Exact value validation
- CPU-XPU consistency verification

cc: @flezaalv, @manuelhsantana

Remove .gitkeep placeholders

- Add invert_permute kernel to CMake build - Implement invert_permute Python wrapper in ops.py - Register invert_permute operator with schema existence check - Add torch_library.h utility for schema validation

Add SYCL/XPU kernel implementation for invert_permute operation.

Add complete test coverage for invert_permute operator on XPU devices, covering correctness, validation, parity, and performance. Test coverage includes: - Correctness tests for int32/int64 with edge cases (empty, single element, identity, reverse, random permutations) - Input validation tests for invalid dimensions and dtypes - Meta function tests for torch.compile compatibility - PyTorch opcheck validation for operator conventions - Parametric tests with varying sizes (1 to 1M elements) - CPU-XPU parity tests to ensure consistent results - Performance benchmarks measuring execution time and bandwidth

- CMakeLists: add permute_1d_sparse_data.cpp to build sources - ops.py: add Python wrapper with type hints - ops_registry.cpp: register operator schema in fbgemm namespace

Implement SYCL/XPU kernel implementation of permute_1D_sparse_data operator for sparse jagged/1D format data permutation.

Replace the custom standalone test_invert_permute.py with a git-am patch applied to upstream FBGEMM v1.7.0 misc_ops_test.py, following the torchcodec-xpu convention. The patch makes test_invert_permute run on XPU (permute.xpu(), gated on torch.xpu.is_available()) and skips the remaining operator tests that are not implemented on XPU.

Collapse the two type-specific kernel functors (InvertPermuteKernelInt32, InvertPermuteKernelInt64) into a single templated functor InvertPermuteKernel<index_t>, mirroring the reference CUDA kernel invert_permute_kernel<index_t>.

… order

Replaced test for upstream patched FBGEMM tests that enables testing XPU. This file is no longer needed.

Add SYCL port of FBGEMM's asynchronous_complete_cumsum operator for Intel XPU devices. The operator computes a complete cumulative sum with a leading zero (e.g., [a, b, c] → [0, a, a+b, a+b+c]).

Integrate asynchronous_complete_cumsum operator into fbgemm-xpu: - Add Python wrapper with complete cumsum documentation - Register operator schema in torch library - Include implementation in CMake build

Add comprehensive test suite for asynchronous_complete_cumsum operator covering: - Basic functionality with int32 and int64 dtypes - Empty tensor handling - Random input validation with numpy reference

…complete_cumsum

Delete the accidentally tracked submodule reference to FBGEMM-v1.7.0.

Add SYCL infrastructure headers from intel/torch-xpu-ops/ to support advanced kernel implementations: - DeviceProperties.h: Device capability queries and work group sizing - SYCLContext.h: SYCL context management and namespace aliases - SYCLHelpers.h: SYCL kernel submission and utility functions - TensorInfo.h: Tensor metadata and dimension handling structures - TensorOptions.h: Tensor configuration and options management - Runtime.h: SYCL runtime utilities - Macros.h: Common macro definitions - Scalar.h: Scalar type conversion utilities These headers provide the foundation for implementing 2D sparse data permutation and other complex SYCL operations on XPU devices.

Add foundational utility headers and implementations to support complex SYCL kernel operations: - utils.h/cpp: Core constants, type definitions, kernel launch helpers, and device property queries - dispatch_macros.h: Type dispatch macros for handling multiple data types (int32, int64, float, etc.) - tensor_utils.h: Tensor manipulation and metadata utilities - function_types.h: Symbol visibility definitions for shared library exports These utilities provide essential infrastructure for implementing 2D sparse data permutation and other advanced operators on XPU devices, including work group sizing, kernel launch helpers, and type-safe dispatching mechanisms.

Add SYCL port of FBGEMM's permute_2D_sparse_data operator for Intel XPU devices. This operator permutes 2D sparse data including lengths [T, B], indices, and optional weights according to a permutation vector, commonly used for reordering embedding table features. Implementation includes: - SYCL kernels: permute_2D_lengths_kernel and permute_2D_data_kernel - Host function: permute_2D_sparse_data_xpu

Integrate permute_2D_sparse_data operator into fbgemm-xpu: - Add Python wrapper with type hints and documentation - Register operator schema in torch library - Include implementation files in CMake build (utils.cpp, SYCL kernels, and operator implementation)

Add comprehensive test suite for permute_2D_sparse_data operator covering: - Basic functionality with int32 and int64 data types - Sparse data with and without weights - Permutations with repeated indices - Exact value validation - CPU-XPU consistency verification

Signed-off-by: Felipe Leza Alvarez <felipe.leza.alvarez@intel.com>

flezaalv · 2026-07-17T18:05:04Z

@@ -0,0 +1,220 @@
+/*


Hi @dvrogozh

I have a question regarding licensing for the files in src/fbgemm_xpu/fbgemm_utils/comm/.

These files were extracted from torch-xpu-ops, and I'm unsure which license header to apply. Should we:

Keep the original torch-xpu-ops license?

Use the fbgemm-xpu package license?

Add a specific attribution/notice?

Could you please advise on the appropriate licensing approach?

Thanks!

flezaalv · 2026-07-17T18:19:14Z

Depends on: #73

This PR introduces the permute_2D_sparse_data operator to fbgemm-xpu, enabling 2D sparse data permutation on Intel XPU devices.

Changes

Core Implementation

SYCL Kernels (permute_2d_sparse_data.cpp/h): SYCL implementation that permutes 2D sparse data (lengths [T, B], indices, and optional weights) according to a permutation vector

Host Function (permute_2d_sparse_dataOp.cpp): Top-level operator function with support for weighted and unweighted sparse data

Operator Registration (ops_registry.cpp): Registers the operator with PyTorch's dispatch system using conditional schema registration to avoid conflicts

Python API (ops.py): Clean Python wrapper function with type hints for easy integration

Infrastructure

Build System (CMakeLists.txt): Added SYCL kernels and utility files to build configuration

SYCL Communication Utilities (fbgemm_utils/comm/): Device properties, SYCL context management, and helper functions from intel-sandbox/custom_operator_xpu

Core Utilities (fbgemm_utils/): Essential infrastructure including:

utils.h/cpp: Kernel launch helpers, device queries, and type definitions

dispatch_macros.h: Type dispatch macros for multiple data types

tensor_utils.h: Tensor manipulation and metadata utilities

function_types.h: Symbol visibility definitions

Testing

Comprehensive Test Suite (test_permute_2d_sparse_data.py):

Correctness validation for int32/int64 data types

Sparse data with and without weights

Permutations with repeated indices

Exact value validation

CPU-XPU consistency verification

cc: @flezaalv, @manuelhsantana

Filename permute_2d_sparse_dataOp.cpp changed to permute_2d_sparse_data_op.cpp to follow the snake_case convention.
The ops.py file was removed to address previous PR comments on Add invert_permute operator with SYCL implementation for XPU #71.
The test_permute_2d_sparse_data.py file was removed. Tests now use upstream FBGEMM tests patched via 0001-Add-XPU-support-to-fbgemm-tests.patch.

The permute_2d_sparse_data_op.cpp file was incorrectly emptied. Restore the SYCL implementation.

aagalleg added 7 commits June 18, 2026 22:37

chore(fbgemm-xpu): remove .gitkeep files from populated directories

081cc88

Remove .gitkeep placeholders

feat(fbgemm-xpu): register invert_permute operation

07bfb4b

- Add invert_permute kernel to CMake build - Implement invert_permute Python wrapper in ops.py - Register invert_permute operator with schema existence check - Add torch_library.h utility for schema validation

feat(fbgemm-xpu): add SYCL kernel implementation for invert_permute

d6d6bad

Add SYCL/XPU kernel implementation for invert_permute operation.

feat(fbgemm-xpu): register permute_1D_sparse_data operator

3056382

- CMakeLists: add permute_1d_sparse_data.cpp to build sources - ops.py: add Python wrapper with type hints - ops_registry.cpp: register operator schema in fbgemm namespace

feat(fbgemm-xpu): add SYCL kernels for permute_1D_sparse_data

b7f3bbf

Implement SYCL/XPU kernel implementation of permute_1D_sparse_data operator for sparse jagged/1D format data permutation.

test(fbgemm-xpu): add comprehensive tests for permute_1D_sparse_data

fd70ab5

aagalleg requested review from dvrogozh, eromomon and luis-real as code owners June 20, 2026 01:29

dvrogozh marked this pull request as draft June 22, 2026 18:36

flezaalv mentioned this pull request Jun 25, 2026

Add block_bucketize_sparse_features operator #76

Draft

flezaalv and others added 17 commits July 13, 2026 18:31

fix(fbgemm-xpu): address PR intel#72 review comments

b71efbe

fix(fbgemm-xpu): remove redundant ops.py and ensure fbgemm_gpu import…

c42bef0

… order

Consolidate FBGEMM XPU test patches into single unified patch

b6baa1b

Fix permute_1D_sparse_data to support 2D weights tensor

ef310d9

chore(fbgemm-xpu): drop standalone test_permute_1d_sparse_data.py

33197a5

Replaced test for upstream patched FBGEMM tests that enables testing XPU. This file is no longer needed.

feat(fbgemm-xpu): add asynchronous_complete_cumsum XPU operator

fd8ea6d

Add SYCL port of FBGEMM's asynchronous_complete_cumsum operator for Intel XPU devices. The operator computes a complete cumulative sum with a leading zero (e.g., [a, b, c] → [0, a, a+b, a+b+c]).

feat(fbgemm-xpu): register asynchronous_complete_cumsum operator

4060711

Integrate asynchronous_complete_cumsum operator into fbgemm-xpu: - Add Python wrapper with complete cumsum documentation - Register operator schema in torch library - Include implementation in CMake build

test(fbgemm-xpu): add tests for asynchronous_complete_cumsum

dcdd4df

Add comprehensive test suite for asynchronous_complete_cumsum operator covering: - Basic functionality with int32 and int64 dtypes - Empty tensor handling - Random input validation with numpy reference

test(fbgemm-xpu): use patched upstream FBGEMM tests for asynchronous_…

f920e44

…complete_cumsum

chore(repo): remove stray FBGEMM-v1.7.0 gitlink

c458218

Delete the accidentally tracked submodule reference to FBGEMM-v1.7.0.

aagalleg force-pushed the feat/permute_2d_sparse_data branch from f9097cb to 6fb2445 Compare July 15, 2026 17:48

flezaalv added 3 commits July 16, 2026 22:30

refactor: rename permute_2d_sparse_dataOp.cpp to snake_case

2a9fdb7

Signed-off-by: Felipe Leza Alvarez <felipe.leza.alvarez@intel.com>

refactor(fbgemm-xpu): improve permute_2D_sparse_data implementation

61c83c0

test(fbgemm-xpu): update FBGEMM test patch with permute_2D fixes

f7a6360

Signed-off-by: Felipe Leza Alvarez <felipe.leza.alvarez@intel.com>

flezaalv force-pushed the feat/permute_2d_sparse_data branch from 2e9498b to f7a6360 Compare July 17, 2026 17:45

test(fbgemm-xpu): remove test files, use upstream FBGEMM patch instead

96c8af7

Signed-off-by: Felipe Leza Alvarez <felipe.leza.alvarez@intel.com>

flezaalv reviewed Jul 17, 2026

View reviewed changes

aagalleg added 2 commits July 17, 2026 22:37

fix(fbgemm-xpu): restore permute_2D_sparse_data operator implementation

cb53ad9

The permute_2d_sparse_data_op.cpp file was incorrectly emptied. Restore the SYCL implementation.

style(fbgemm-xpu): add trailing newline to permute_2d_sparse_data_op.cpp

69d53cf

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Add permute_2D_sparse_data operator with SYCL implementation for XPU - #74

Add permute_2D_sparse_data operator with SYCL implementation for XPU#74
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aagalleg commented Jun 20, 2026

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flezaalv Jul 17, 2026

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flezaalv commented Jul 17, 2026

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aagalleg commented Jun 20, 2026

Changes

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flezaalv Jul 17, 2026

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flezaalv commented Jul 17, 2026

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