feat: Row-engine board renderer as a Dioxus component (M2) - #231
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Port the spike's SVG row layout engine (spikes/hardware-boards, rev 5) into lpa-boards: geometry.rs computes the full deterministic layout (rails, band rows, leaders, viewBox) from the pin-pitch unit u, and diagram.rs walks it as a BoardDiagram component behind a new 'diagram' feature so data-only consumers (lp-cli) stay Dioxus-free. Plan: 2026-07-31-1002-hardware-board-selection (M2) Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>
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July 31, 2026 21:31
DESIGN-LANGUAGE.md (spike rev 5) lands as docs/design/board-diagrams.md; crate README gains BoardDiagram usage; stale spike pointers updated. Plan: 2026-07-31-1002-hardware-board-selection (M2) Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>
Thirteen stories cover the M2 gate: every mode at u=12/13, smallest (XIAO C6) and largest (DevKitC v4) boards, the QuinLED band/leader case, discovery swatches with a bound-violet confirmed state, and the annotated-anatomy figure whose callout anchors come from the shared geometry module rather than hand positioning. The lpb-* CSS block maps cell families onto studio status colors (conn = bound violet, adc = good, touch = attention, dac = live, pwr = error) with spike-tuned literals for hues the palette lacks. Plan: 2026-07-31-1002-hardware-board-selection (M2) Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>
Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>
The BoardDrawing doc comment feeds the schemars description; pointing it at docs/design/board-diagrams.md changed the generated schema. Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>
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CI refreshed the story baselines on this branchThe Review every PNG in the PR's Files changed view (swipe / onion-skin). |
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August 1, 2026 00:05
The Ethernet WLED-class 4-channel controller (Amazon B0GH7LPNQV), authored from its silkscreen: WROOM-32E-N4, four fused data channels (IO18/16/14/2), IO13 aux, screw-terminal rails both sides, stacked OPT/RST buttons drawn vertically adjacent (the 2D compromise). Display- only per the classic-ESP32 allowlist; price is an approximate street figure pending correction. Plan: 2026-07-31-1002-hardware-board-selection (M2 follow-up) Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>
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…ds elsewhere domraem/dom-z-102's runtime manifest arrives with the classic bring-up roadmap while its display sidecar + catalog entry are authored on PR #231 (board catalog work) — the first runtime-first board, so the drift gate gains the mirror of DISPLAY_ONLY, strict the same way: once #231 merges, the entry must be removed or the gate fails. Also refreshed the two stale DISPLAY_ONLY reasons ('no HardwareTarget yet' — HardwareTarget::Esp32 landed with this branch). Plan: 2026-07-31-1444-classic-esp32-bringup (M2 P5 follow-through) Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>
The runtime manifest (PR #239) deliberately omits /gpio/13 — its function is unverified — so the display pin must be non-output-eligible or the drift gate's Rule 2 fails the moment both files share a branch. rsvd keeps the terminal drawn (it exists on the silkscreen) but muted and never claimable; both files upgrade together if IO13 is verified usable. Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>
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Coordination with #239 (classic ESP32 bring-up), which adds
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…2, not LED1-4) Cross-checked with the board-catalog session's silkscreen read (PR #231): terminals are printed IO18/IO16/IO14/IO2, and an unverified IO13 terminal exists (omitted here, drawn non-claimable in their sidecar). Description now states which facts are silkscreen-verified vs standard-wiring inference. Plan: 2026-07-31-1444-classic-esp32-bringup (M2 P5 follow-through) Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>
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…rift exemptions Semantic cross-PR drift the textual merge couldn't see: PR #231 (main) landed the display sidecar with a DISPLAY_ONLY exemption waiting on this branch's runtime manifest, while this branch carried the RUNTIME_ONLY exemption waiting on #231. Merging main satisfied both conditions at once, and the drift test correctly demanded both entries be removed. Co-Authored-By: Claude Fable 5 <noreply@anthropic.com>
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Brings the spike branch up to date with main (225 commits) so the frozen UX-spike artifacts under spikes/hardware-boards/ can land beside the implementation they produced (lp-app/lpa-boards, PRs #228/#231/#236). Clean merge: the branch adds only new files in a directory that does not exist on main. Co-Authored-By: Claude Opus 5 <noreply@anthropic.com>
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Plan: lp2025/2026-07-31-1002-hardware-board-selection
Path: ~/.photomancer/planning/lp2025/2026-07-31-1002-hardware-board-selection/m2-row-engine-renderer.md
M2 of the hardware/board-selection roadmap: the approved UX spike's SVG row-engine renderer (
spikes/hardware-boards/index.html, rev 5, PR #222) ported intolpa-boardsas a reusableBoardDiagramDioxus component consuming the M1 display sidecars. Retargeted tomainafter #228 merged.What landed
lpa-boards/src/geometry.rs— the row layout engine. Every drawn coordinate derives from the pin-pitch unitu(pad 0.62u×0.45u, cell 0.78u, font 0.5u, gap 0.22u) and the module is the single home for those constants.BoardLayoutis public and deterministic: stories compute anatomy-callout anchors from the same layout the renderer draws.lpa-boards/src/diagram.rs—BoardDiagram(modesplain | caps | wired | swatch, labels inside the board, band rows + leader lines for terminals, negative-y buttons, role-colored pads), behind adiagramcargo feature so lp-cli stays Dioxus-free.docs/design/board-diagrams.md— the design language, ported from the spike's DESIGN-LANGUAGE.md.lpb-*CSS block in the studio stylesheet: cell families mapped onto studio status colors — conn = bound violet, adc = good, touch = attention, dac = live, pwr = error — with spike-tuned literals for hues the palette lacks (spi/i2c/uart/amber/silk).studio/board-diagram/*): every mode at u=12/13, smallest (XIAO C6) + largest (DevKitC v4) boards, QuinLED band/leader case, discovery swatches incl. bound-violet confirmed state, catalog thumbnail strip, annotated anatomy.Deviations from the spike
rsvdrole (new in M1) renders with the input-only pad fill + IO-prefixed names.Validation
just checkgreen;just testrunning locally; studio-web view tests 215 green; lpa-boards 17 tests incl. 7 geometry invariants; wasm32 check green.Status
At the M2 visual gate — PR stays draft until the gate passes (density vs spike rev 5, studio-palette cell colors, anatomy doc-quality).
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