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pure-hardware-YOLO-inference
pure-hardware-YOLO-inference PublicYOLO inference on FPGA without any intervention from software through utilizing FINN framework, Vivado and Verilog HDL
Jupyter Notebook 3
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MK5303-Processor
MK5303-Processor PublicA 3 address processor of instruction set from my design. The processor is of 4 addressing modes: register, direct, indirect and immediate modes. It was implemented using Verilog, simulated using Qu…
Verilog
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Ultrasonic-zynq7000-based-system
Ultrasonic-zynq7000-based-system PublicA shared repository between Software, Embedded and FPGA teams to handle sending and receiving ultrasonic waves from the appropriate transducers. The project is based on Xilinix Zynq7000 board.
SystemVerilog 1
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SV2_Analyzer
SV2_Analyzer PublicOpen-source LLM-based framework for accelerating Digital Verification flow for Verilog, SystemVerilog and UVM
Jupyter Notebook
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Digital-Signal-Processing-Unit
Digital-Signal-Processing-Unit PublicA DSP based on xilinix FPGA DSP (DSP48E1) with some extra combinational logic. The project was implemented using verilog. The design schematics including the implemented design was done through viv…
Verilog 1
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