🐛 Fix fdiv/fsqrt directed rounding in the legacy divsqrt unit#28
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emiliengnr wants to merge 1 commit into
Open
🐛 Fix fdiv/fsqrt directed rounding in the legacy divsqrt unit#28emiliengnr wants to merge 1 commit into
emiliengnr wants to merge 1 commit into
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Hello, here is a pull request for a bug I found.
fpnew_divsqrt_multi drives the legacy PULP div_sqrt_top_mvp unit and passes the
instruction's rounding mode straight to its RM_SI port, but the two use different
encodings. Round-to-nearest-even and round-toward-zero agree, but round-down and
round-up are swapped (RM_SI 2 is toward +inf, 3 is toward -inf), and
round-to-nearest-ties-to-max has no case and falls through to truncate. So fdiv
and fsqrt round one ulp the wrong way under the directed modes, for single and
double precision.
The fix translates the mode into the divsqrt encoding before driving RM_SI
(round-down to 3, round-up to 2, ties-to-max to nearest since the legacy unit has
no ties-to-max mode). Round-to-nearest-even and round-toward-zero are unchanged.
Note: this fixes the round-down / round-up swap at the cvfpu wrapper by translating the mode before RM_SI. pulp-platform/fpu_div_sqrt_mvp/pull/20 fixes the same swap at its source (and also the overflow case). Only one should land, since applying both swaps the modes twice and brings the bug back.