feat(vcr-ra): flip stack-reload-forwarding + frame-slot DCE to default-on (#242)

[avrabe]

What

Flips the two paired frame-traffic passes from #514/#515 (forward_stack_reloads

• eliminate_dead_frame_stores) from opt-in to DEFAULT-ON. Escape hatch:
  SYNTH_NO_STACK_FWD=1. This is the feature-loop step that turns the flag-off
  levers into an actual delivered win — same gated path as cmp→select (v0.13.0) and
  local-promotion (v0.14.0).

The win lands on the SHIPPED --relocatable path (the post-passes run on the
direct selector's output, which is what gale ships):

fixture (--relocatable, cortex-m4)	before	after
flight_seam	774 B	738 B
flight_seam_flat	910 B	878 B
control_step	304 B	304 B (unchanged)
signed_div_const / all RV32	—	unchanged (ARM-only)

Correctness — results bit-identical

anchor	check
control_step	0x00210A55, control_step_differential.py 13/13
flat + inlined flight_algo	0x07FDF307, flight_seam_differential.py MATCH both

The execution differential now runs both the default and the SYNTH_NO_STACK_FWD
opt-out against wasmtime (a default flip is only safe if the shipped path and
its rollback both match) and asserts the two emit different bytes (flip
engaged). Broad oracle: cargo test --workspace green under the new default
(the wast/spec suite is compile-only, so gale's G474RE silicon is the
broad-execution check). Clean-room verified — 6/6 falsifiable claims
reproduced by an independent agent with its own harness (incl. confirming the flip
is ARM-wide m4+m7 and RISC-V byte-identical).

Soundness

Overwrite-only DCE (a str [sp,#N] is dead only when a later store to the same
immediate slot overwrites it with no intervening read; reaching the function end
does not count), with sub-word sp accesses (ldrb/ldrh/…) as blockers — the
advisor-caught #483-class hole, with a test verified failing pre-fix. 8 unit tests
pin the boundaries.

Gating

• Frozen goldens re-frozen (flight_seam, flight_seam_flat); control_step + RV32
  untouched. New frozen_fixtures_stack_fwd_escape_hatch_restores_old_bytes
  asserts SYNTH_NO_STACK_FWD=1 restores the pre-flip bytes byte-for-byte — the
  rollback proof and a tripwire.
• CI oracle updated to test the default + the opt-out.

Honest framing

This is an instruction/memory-op proxy win (flight_algo sp-traffic 20→7,
139→135 insns). The measured cycle number is gale's G474RE, confirmed
post-ship per the cmp→select silicon-gate-waiver precedent — the merge is not
gated on silicon, the perf claim is. const-CSE stays flag-off (its
alias-eviction prerequisite is open and it is inert on flat_flight).

VCR-RA / epic #242.

[codecov]

Codecov Report

✅ All modified and coverable lines are covered by tests.

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