Lay out parallel series branches

[MustafaMulla29]

Summary

• detect even strong-connection series paths that leave and return to two pins on the same side of a main chip
• add a dedicated ParallelSeriesBranchSolver inner-partition strategy that starts from the generic packed layout and folds matching paths into two aligned branches
• preserve allowed component rotations and reject refinements that cannot maintain chipGap
• add Core-captured BQ24074 repro coverage for both top-side and right-side chip pins

Root cause

The generic packer minimizes connection distance, but the affected topology has multiple compact foldings. It has no concept of the conventional U-shaped schematic arrangement, so one status LED branch could be placed in line with the other branch instead of forming two parallel columns or rows.

The new behavior is isolated from SingleInnerPartitionPackingSolver: PackInnerPartitionsSolver selects the specialized strategy only when the topology matches, and the solver retains the original packed placement if the refinement is unsafe.

Impact

Strongly connected series branches now align predictably with the side of the main chip without manual schX/schY coordinates. Top/bottom attachments become parallel columns, while left/right attachments become parallel rows.

Validation

• bun test — 80 passed, 1 skipped
• bun run build
• bun run format:check
• focused top-side and right-side BQ24074 repro tests and SVG snapshots

Before:

After:

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Project	Deployment	Actions	Updated (UTC)
matchpack	Ready	Preview	Jul 30, 2026 3:48pm

[mohan-bee]

lg , will this handle 3 series branches ??

[MustafaMulla29]

lg , will this handle 3 series branches ??

Yes

[tscircuitbot]

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Thank you for your contribution! 🎉

PR Rating: ⭐⭐⭐
Impact: Major

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