Dual-core 16-bit RISC processor
-
Updated
Jul 21, 2024 - VHDL
Dual-core 16-bit RISC processor
In this project we implemented a slightly modified version of Space Invaders on an FPGA.
Verilog implementation of an incremental memory system and FPGA seat reservation system
CPU de 8 bits com acumulador + RAM 8x8, implementadas em VHDL no Vivado.
Micro Electronics Lab 2022
Add a description, image, and links to the basys2 topic page so that developers can more easily learn about it.
To associate your repository with the basys2 topic, visit your repo's landing page and select "manage topics."